Data di Pubblicazione:
2001
Citazione:
Trap characterization in buried-gate n-channel 6H-SiC JFETs / Meneghesso, G.; Chini, Alessandro; Verzellesi, Giovanni; Cavallini, A.; Canali, Claudio; Zanoni, E.. - In: IEEE ELECTRON DEVICE LETTERS. - ISSN 0741-3106. - STAMPA. - 22:9(2001), pp. 432-434. [10.1109/55.944330]
Abstract:
We present a detailed characterization of deep traps present in buried gate, n-channel 6H-SiC JFETs, based on transconductance measurements as a function of frequency. Four different deep levels have been identified, which are characterized by activation energies of 0.16, 0.18, 0.28 and 0.54 eV. Furthermore, based on the transconductance frequency dispersion features (upward or downward dispersion), we have been able to infer that three deep levels (0.16, 0.18 and 0.54 eV) are hole traps localized in thep-gate layer and one (0.28 eV) is an electron trap localizedin the n-channel.
Tipologia CRIS:
Articolo su rivista
Keywords:
Silicon carbide; JFET; deep levels; traps; transconductance dispersion.
Elenco autori:
Meneghesso, G.; Chini, Alessandro; Verzellesi, Giovanni; Cavallini, A.; Canali, Claudio; Zanoni, E.
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