Assessment of dual-oxide options for LDMOS transistors in FinFET technology

We present a comparison of three LDMOS transistor designs in ≃16 nm FinFET technology with different gate stack configurations: thick ITL oxide, thin ITL oxide, and a combination of both (dual ITL oxide thickness). We analyze by simulation how the gate oxide stack influences the main performance and time-zero degradation rate indicators. The simulations suggest that, for the same doping profile and gate length (LG), the dual-oxide configuration has transition frequency (fT) and on-resistance (RDS,on) within ≈16% and 6% of those of thick and thin-oxide devices, respectively, while the maximum substrate and gate currents are ≈35% and 43% smaller than for a fully thin-oxide device, respectively. Consequently, the dual-oxide configuration enables LG scaling and improvements in fT and RDS,on while keeping degradation monitors under control.