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  1. Research Outputs

HEMT transistor with high stress resilience during off state and manufacturing method thereof

Patent
Publication Date:
2018
Short description:
HEMT transistor with high stress resilience during off state and manufacturing method thereof / Iucolano, Ferdinando; Chini, Alessandro. - (2018 Jun 08).
abstract:
An HEMT includes a buffer layer, a hole-supply layer on the buffer layer, a heterostructure on the hole-supply layer, and a source electrode. The hole-supply layer is made of P-type doped semiconductor material, the buffer layer is doped with carbon, and the source electrode is in direct electrical contact with the hole-supply layer, such that the hole-supply layer can be biased to facilitate the transport of holes from the hole-supply layer to the buffer layer.
Iris type:
Brevetto
Keywords:
HEMT, Power FET, WBG Semiconductors
List of contributors:
Iucolano, Ferdinando; Chini, Alessandro
Authors of the University:
CHINI Alessandro
Handle:
https://iris.unimore.it/handle/11380/1167434
Full Text:
https://iris.unimore.it//retrieve/handle/11380/1167434/259858/US10516041B2.pdf
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