Top-down and bottom-up approaches for novel magnetic and plasmonic nanostructures

The increasing demand for miniaturization in microelectronics has led to a gigantic progress in developing high resolution patterning techniques. Today, the gate length of a transistor approaches 50 nanometers, that is 10 times smaller than 15 years ago. Such miniaturization is based on the enormous progress of both the writing lithography and etching methods for producing nanostructures down to 50 nm inside a thin film. This is the top-down route at the scale of the « nanoworld ». In a parallel approach, researchers know how to favor the growth of nanostructures on surfaces presenting some roughness like atomic step bunches. A perfect control of such growth allows the formation of nanostructures with the exact desired size of a few tens of nanometers. This second route is called the “bottom-up” approach. It will be shown that both approaches can be combined to organize small nanostructures (~10 nm) on surface, to confine them at the desired place and finally to connect them to the “microworld”. Two different applications for spintronics and plasmonics will be presented and discussed.