Publication Date:
2013
Short description:
On the Optimization of SiGe and III-V Compound Hetero-Junction Tunnel FET Devices / Revelant, Alberto; Palestri, Pierpaolo; Osgnach, Patrik; Lizzit, Daniel; Selmi, Luca. - STAMPA. - (2013), pp. 49-52. ( 43rd European Solid-State Device Research Conference, ESSDERC 2013 Bucharest, rou September 2013) [10.1109/ESSDERC.2013.6818816].
abstract:
We investigate the operation and performance of planar SiGe/Si and n0.53Ga0.47As/In0.7Ga0.3As/In0.53Ga0.47As hetero-junction Semiconductor on Insulator (ScOI) Tunnel FET
(TFET) devices. The alignment between the hetero-junction, the gate edge and the source junction is systematically shifted to search for the highest ON-current and the lowest Subthreshold Swing (SS). A slight positive misalignment between the heterojunction and the metallurgical junction is beneficial to improve
ION but for the considered devices the ON-current at VDD=0.5V and IOFF=1pA/m hardly exceeds 1A/m. Furthers reduction of the band gap by lattice strain appears mandatory to exceed this limit in the explored material systems.
Iris type:
Relazione in Atti di Convegno
List of contributors:
Revelant, Alberto; Palestri, Pierpaolo; Osgnach, Patrik; Lizzit, Daniel; Selmi, Luca
Book title:
Proceedings 2013 European Solid State Device Research Conference
Published in: