Efficient OpenMP support and extensions for MPSoCs with explicitly managed memory hierarchy
Contributo in Atti di convegno
Data di Pubblicazione:
2009
Citazione:
Efficient OpenMP support and extensions for MPSoCs with explicitly managed memory hierarchy / Marongiu, A., Benini, L.. - (2009), pp. 809-814. (2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09 Nice, fra 2009 April 20-24) [10.1109/date.2009.5090774].
Abstract:
Abstract—OpenMP is a de facto standard interface of the shared
address space parallel programming model. Recently, there have been
many attempts to use it as a programming environment for embedded
MultiProcessor Systems-On-Chip (MPSoCs). This is due both to the ease
of specifying parallel execution within a sequential code with OpenMP
directives, and to the lack of a standard parallel programming method
on MPSoCs. However, MPSoC platforms for embedded applications
often feature non-uniform, explicitly managed memory hierarchies with
no hardware cache coherency as well as heterogeneous cores with
heterogeneous run-time systems.
In this paper we present an optimized implementation of the compiler
and runtime support infrastructure for OpenMP programming for a
non-cache-coherent distributed memory MPSoC with explicitly managed
scratchpad memories (SPM). The proposed framework features specific
extensions to the OpenMP programming model that leverage explicit
management of the memory hierarchy. Experimental results on different
real-life applications confirm the effectiveness of the optimization in terms
of performance improvements.
address space parallel programming model. Recently, there have been
many attempts to use it as a programming environment for embedded
MultiProcessor Systems-On-Chip (MPSoCs). This is due both to the ease
of specifying parallel execution within a sequential code with OpenMP
directives, and to the lack of a standard parallel programming method
on MPSoCs. However, MPSoC platforms for embedded applications
often feature non-uniform, explicitly managed memory hierarchies with
no hardware cache coherency as well as heterogeneous cores with
heterogeneous run-time systems.
In this paper we present an optimized implementation of the compiler
and runtime support infrastructure for OpenMP programming for a
non-cache-coherent distributed memory MPSoC with explicitly managed
scratchpad memories (SPM). The proposed framework features specific
extensions to the OpenMP programming model that leverage explicit
management of the memory hierarchy. Experimental results on different
real-life applications confirm the effectiveness of the optimization in terms
of performance improvements.
Tipologia CRIS:
Relazione in Atti di Convegno
Elenco autori:
Marongiu, A.; Benini, L.
Link alla scheda completa:
Titolo del libro:
Design, Automation & Test in Europe Conference & Exhibition, DATE '09
Pubblicato in: