Latch-up in CMOS Integrated Circuits

Chapter
Publication Date:
1989
Short description:
Latch-up in CMOS Integrated Circuits / Fantini, F., M., M., E., Z. - In: Microlelectronic reliability, volume II, Integrity Assessment and Assurance / E. POLLINO. - STAMPA. - NORWOOD, MA : Artech House, Inc., 1989. - ISBN 0890063508. - pp. 151-194
abstract:
The physics of latch-up. Electrical characterization. Analytical techniques. Layout and technological improvements for avoiding latch-up.
Iris type:
Capitolo/Saggio
Keywords:
Latch-up. CMOS. SEM Voltage Contrast.
List of contributors:
Handle:
https://iris.unimore.it/handle/11380/461529
Book title:
Microlelectronic reliability, volume II, Integrity Assessment and Assurance